bits 16
-org 0x7c00
+org 7c00h
; =============================================================================
; settings --------------------------------------------------------------------
%define DEAD ' ' ; char to represent a dead cell
-%define ALIVE '#' ; char to represent an alive cell
-%define PRINT_COLOR 0x07 ; grey on black
-%define WAIT_DELAY 0x02 ; 0.131072 seconds
+%define ALIVE '.' ; char to represent an alive cell
+%define PRINT_COLOR 07h ; grey on black
+
+%define WAIT_DELAY_CX 01h ; cx:dx = delay in microseconds
+%define WAIT_DELAY_DX 00h
; constants -------------------------------------------------------------------
%define COLS 80
%define ROWS 25
-%define VGAPGSZ (COLS * ROWS * 2)
+%define VGAPGSZ 1000h
; memory layout ---------------------------------------------------------------
-%define ORG 0x7c00
-%define VGA 0xb8000
+%define ORG 7c00h
+%define VGA 0b8000h
%define DAT ORG + 512
; static variables ------------------------------------------------------------
cld
; disable cursor
-mov ch, 0x3f ; cursor start and options
-mov ah, 0x01 ; set text-mode cursor shape
-int 0x10 ; video services
+mov ch, 3fh ; cursor start and options
+mov ah, 01h ; set text-mode cursor shape
+int 10h ; video services
; initialize xss
-mov ah, 0x00 ; get
-int 0x1a ; system time
+
+set_xss_seed:
+
+mov ah, 00h ; get
+int 1ah ; system time
+
+cmp dx, 0
+je set_xss_seed ; if seed is 0, xs wont work properly
+
mov [xss], dx ; cx:dx = number of clock ticks since midnight
; initialize currvgapg
-mov word [currvgapg], VGAPGSZ
+mov word [currvgapg], 0
; start simulation from random state ------------------------------------------
next_state:
-call flip_vga_page ; display current state
-call delay ; sleep a little
-
-call write_next_vga_page ; write the next state to the hidden page
+call vsync_wait
+call write_next_vga_page
+call delay
+call flip_vga_page
jmp next_state
delay:
-mov cx, WAIT_DELAY ; cx:dx = interval in microseconds
-mov dx, 0
+mov cx, WAIT_DELAY_CX
+mov dx, WAIT_DELAY_DX
-mov ah, 0x86
-int 0x15 ; wait
+mov ah, 86h
+int 15h ; wait
ret
vsync_wait:
-mov dx, 0x3da ; input status #1 register
+mov dx, 3dah ; input status #1 register
.wait_on:
in al, dx
- test al, 0x08 ; vertical retrace bit
+ test al, 08h ; vertical retrace bit
jnz .wait_on
.wait_off:
in al, dx
- test al, 0x08
+ test al, 08h
jz .wait_off
ret
xor word [currvgapg], VGAPGSZ ; flip currvgapg
setnz al ; al = !(currvgapg == 0)
-mov ah, 0x05 ; select active display page
-int 0x10 ; video services
+mov ah, 05h ; select active display page
+int 10h ; video services
ret
; output:
; ax = # alive neighbours
-; clobbers ?
+; clobbers ax, bx, dx
alive_neighbours:
+enter 5, 0
+
+; [bp - 1]: row
+; [bp - 2]: col
+; [bp - 3]: neighbours
+; [bp - 4]: i
+; [bp - 5]: j
+
+mov ax, cx ; ax = idx
+mov bl, COLS ; bl = COLS
+div bl ; al = idx / COLS ; ah = idx % COLS
+
+mov [bp - 1], al ; row = idx / COLS
+mov [bp - 2], ah ; row = idx % COLS
+mov byte [bp - 3], 0 ; neighbours = 0
+
+mov byte [bp - 4], -1 ; i = -1
+.i: ; do {
+
+ mov byte [bp - 5], -1 ; j = -1
+.j: ; do {
+
+ mov al, [bp - 4]
+ or al, [bp - 5]
+ jz .continue ; if (!i && !j) continue
+
+ mov al, [bp - 1]
+ add al, [bp - 4] ; al = row + i
+
+ cmp al, 0
+ jl .continue ; if (row + i < 0) continue
+
+ cmp al, ROWS
+ jge .continue ; if (row + i >= ROWS) continue
+
+ mov ah, [bp - 2]
+ add ah, [bp - 5] ; ah = col + j
+
+ cmp ah, 0
+ jl .continue ; if (col + j < 0) continue
+
+ cmp ah, COLS
+ jge .continue ; if (col + j >= COLS) continue
+
+ movzx bx, ah ; bx = col + j
+
+ mov ah, COLS
+ mul ah ; ax = (row + i) * COLS
+
+ add bx, ax ; bx = cell index
+ shl bx, 1 ; bx = grid offset
+
+ mov dx, [es:si + bx] ; dl = cell state
+
+ cmp dl, ALIVE ; if (!ALIVE) continue
+ jne .continue
+
+ inc byte [bp - 3] ; neighbours++
+
+.continue:
+ inc byte [bp - 5]
+ cmp byte [bp - 5], 1
+ jle .j ; } while (++j <= 1)
+
+ inc byte [bp - 4]
+ cmp byte [bp - 4], 1
+ jle .i ; } while (++i <= 1)
-; todo
+movzx ax, byte [bp - 3] ; ax = # alive neighbours
+leave
ret
; write_next_cell_state() -----------------------------------------------------
; output:
; [es:di + cx * 2] = updated cell state
-; clobbers ?
+; clobbers ax, bx, dx
write_next_cell_state:
mov dx, [es:si + bx] ; dl = cell current state
-test dl, ALIVE ; if (ALIVE) {
-jne 1f
+cmp dl, ALIVE ; if (ALIVE) {
+jne .else
-test ax, 2 ; if (n < 2)
+cmp ax, 2 ; if (n < 2)
jl .dead ; return DEAD
-test ax, 3 ; if (n > 3)
+cmp ax, 3 ; if (n > 3)
jg .dead ; return DEAD
jmp .alive ; return ALIVE
-1: ; }
+.else: ; }
-test ax, 3 ; if (n != 3)
+cmp ax, 3 ; if (n != 3)
jne .dead ; return DEAD
.alive: ; return ALIVE
; write_next_vga_page() -------------------------------------------------------
-; clobbers di, si, cx
+; clobbers di, si, ax, bx, cx, dx
write_next_vga_page:
call write_next_cell_state
inc cx
-test cx, COLS * ROWS
+cmp cx, COLS * ROWS
jl .update_loop ; for i in [0 .. COLS * ROWS - 1]
ret
; =============================================================================
times 510 - ($ - $$) db 0 ; fill remaining bytes with zeroes
-dw 0xaa55 ; mbr magic byte
+dw 0aa55h ; mbr magic byte