X-Git-Url: https://git.wirehaze.ovh/lifeboot.git/blobdiff_plain/0d9586ff094ca3530341657b0ded38e747286de8..1a5860dd84e2f3409daf770a67818a5997819711:/lifeboot.asm diff --git a/lifeboot.asm b/lifeboot.asm index 2d1542f..b81453c 100644 --- a/lifeboot.asm +++ b/lifeboot.asm @@ -25,7 +25,7 @@ org 0x7c00 ; static variables ------------------------------------------------------------ %define xss DAT ; xs() state (word) -%define currvgapg xss + 2 ; current vga page near pointer (word) +%define currvgapg DAT + 2 ; current vga page near pointer (word) ; ============================================================================= @@ -33,10 +33,10 @@ org 0x7c00 ; initialize segment registers mov ax, VGA >> 4 -mov ds, ax mov es, ax xor ax, ax +mov ds, ax mov ss, ax ; set stack pointers @@ -59,15 +59,22 @@ mov [xss], dx ; cx:dx = number of clock ticks since midnight ; initialize currvgapg mov word [currvgapg], VGAPGSZ -; setup ----------------------------------------------------------------------- +; start simulation from random state ------------------------------------------ -setup: +start: call init_grid -call flip_vga_page -call delay -jmp setup +; apply game of life's rules to determine the next state ---------------------- + +next_state: + +call flip_vga_page ; display current state +call delay ; sleep a little + +call write_next_vga_page ; write the next state to the hidden page + +jmp next_state ; ============================================================================= @@ -87,11 +94,11 @@ int 0x15 ; wait ret -; vsync() - wait for display to enter the next VBlank cycle ------------------- +; vsync_wait() - wait for display to enter the next VBlank cycle -------------- ; clobbers ax, dx -vsync: +vsync_wait: mov dx, 0x3da ; input status #1 register @@ -165,7 +172,7 @@ ret flip_vga_page: -call vsync +call vsync_wait xor word [currvgapg], VGAPGSZ ; flip currvgapg setnz al ; al = !(currvgapg == 0) @@ -175,6 +182,125 @@ int 0x10 ; video services ret +; alive_neighbours() ---------------------------------------------------------- + +; input: +; es:si -> current grid +; cx -> cell index + +; output: +; ax = # alive neighbours + +; clobbers ? + +alive_neighbours: +enter 5, 0 + +; [bp - 1]: row +; [bp - 2]: col +; [bp - 3]: neighbours +; [bp - 4]: i +; [bp - 5]: j + +mov ax, cx ; ax = idx +mov bl, COLS ; bl = COLS +div bl ; al = idx / COLS ; ah = idx % COLS + +mov [bp - 1], al ; row = idx / COLS +mov [bp - 2], ah ; row = idx % COLS +mov byte [bp - 6], 0 ; neighbours = 0 + +mov byte [bp - 8], -1 ; i = -1 +.i: ; do { + + mov byte [bp - 10], -1 ; j = -1 +.j: ; do { + + ; if ((row || col) && get_state (grid, row + i, col + i) == ALIVE) + ; neighbours++ + + inc byte [bp - 10] + cmp byte [bp - 10], 1 + jle .j ; } while (++j <= 1) + + inc byte [bp - 8] + cmp byte [bp - 8], 1 + jle .i ; } while (++i <= 1) + +leave +ret + +; write_next_cell_state() ----------------------------------------------------- + +; input: +; es:si -> current grid +; es:di -> next grid +; cx -> cell index + +; output: +; [es:di + cx * 2] = updated cell state + +; clobbers ? + +write_next_cell_state: + +call alive_neighbours ; ax = # alive neighbours + +mov bx, cx +shl bx, 1 + +mov dx, [es:si + bx] ; dl = cell current state + +test dl, ALIVE ; if (ALIVE) { +jne .else + +test ax, 2 ; if (n < 2) +jl .dead ; return DEAD + +test ax, 3 ; if (n > 3) +jg .dead ; return DEAD + +jmp .alive ; return ALIVE + +.else: ; } + +test ax, 3 ; if (n != 3) +jne .dead ; return DEAD + +.alive: ; return ALIVE +mov dl, ALIVE +jmp .write + +.dead: +mov dl, DEAD + +.write: +mov [es:di + bx], dx + +ret + +; write_next_vga_page() ------------------------------------------------------- + +; clobbers di, si, cx + +write_next_vga_page: + +mov si, [currvgapg] ; es:si -> current page + +mov di, VGAPGSZ +xor di, si ; es:di -> next page + +xor cx, cx ; i = 0 + +.update_loop: +call write_next_cell_state + +inc cx +test cx, COLS * ROWS +jl .update_loop ; for i in [0 .. COLS * ROWS - 1] + +ret + ; halt() - stop program execution --------------------------------------------- halt: