MEMORY
{
  flash (rx) : ORIGIN = 0x08000000, LENGTH = 512K
  sram (rw) : ORIGIN = 0x20000000, LENGTH = 128K
}

_flash_start = ORIGIN(flash);
_flash_end = ORIGIN(flash) + LENGTH(flash);

_sram_start = ORIGIN(sram);
_sram_end = ORIGIN(sram) + LENGTH(sram);

SECTIONS
{
  .vtbl :
    {
      *(.vtbl)
      . = 0x400;
    } >flash
  .text :
    {
      *(.text*)
    } >flash
  .rodata :
    {
      . = ALIGN(4);
      *(.rodata*)
      . = ALIGN(4);
    } >flash
  .data :
    {
      . = ALIGN(4);
      *(.data*)
      . = ALIGN(4);
    } >sram AT>flash
  .bss :
    {
      . = ALIGN(4);
      *(.bss*)
      . = ALIGN(4);
    } >sram
}

_data_vma_start = ADDR(.data);
_data_vma_end = ADDR(.data) + SIZEOF(.data);
_data_lma_start = LOADADDR(.data);

_bss_vma_start = ADDR(.bss);
_bss_vma_end = ADDR(.bss) + SIZEOF(.bss);
