v4.0/src/DEV/RAMDRIVE/LOADALL.INC

   1 BREAK   <LOADALL descriptor caches>
   2
   3 DEF_ACCESS      EQU     92H
   4 DEF_LIMIT       EQU     0FFFFH
   5
   6 SEGREG_DESCRIPTOR STRUC
   7 SEG_BASE        DW      ?
   8                 DB      ?
   9 SEG_ACCESS      DB      DEF_ACCESS
  10 SEG_LIMIT       DW      DEF_LIMIT
  11 SEGREG_DESCRIPTOR ENDS
  12
  13 DTR_DESCRIPTOR STRUC
  14 DTR_BASE        DW      ?
  15                 DB      ?
  16                 DB      0
  17 DTR_LIMIT       DW      ?
  18 DTR_DESCRIPTOR ENDS
  19 ;
  20 ; 386 Descriptor template
  21 ;
  22 desc    struc
  23 lim_0_15        dw      0               ; limit bits (0..15)
  24 bas_0_15        dw      0               ; base bits (0..15)
  25 bas_16_23       db      0               ; base bits (16..23)
  26 access          db      0               ; access byte
  27 gran            db      0               ; granularity byte
  28 bas_24_31       db      0               ; base bits (24..31)
  29 desc    ends
  30
  31 gdt_descriptor  struc
  32 gdt_limit       dw      ?
  33 gdt_base_0      dw      ?
  34 gdt_base_2      dw      ?
  35 gdt_descriptor  ends